The present invention relates to a semiconductor memory having multiple access ports, and particularly a VIDEO RAM suitable to store information to be displayed.
Due to the rapid spread of personal computers, there has been an increasing demand for a memory for generating a video signal, that is, a VIDEO RAM, which is employed for a CRT display.
A VIDEO RAM stores bits which represent an image to be displayed on a CRT. During the display period, the VIDEO RAM is subjected to a read operation to obtain the data for synthesizing the image. The read-out data is applied to the CRT in sync with horizontal and vertical sync signals.
After the display period, the synchronizing signals are inactive to introduce non-display period into the system. During the non-display period, the VIDEO RAM can incorporate new data, defining a new image, under control of a CPU (Central Processing Unit). By repeating the display and non-display periods, the image on the screen of the CRT is renewed.
Access between the VIDEO RAM and the CPU is conducted only during the non-display period. The ratio of the non-display period to the cycle time of the vertical synchronizing signal has significance for evaluating the CPU efficiency. If the above ratio is large, a large amount of data can be exchanged between the CPU and the VIDEO RAM. Simply increasing the above ratio results in a lower display duty. The typical value of CPU efficiency at the present stage is on the order of 30 percent. This value is not enough for a high speed large capacity display system.
For example, even a CPU which can operate at a clock rate of 4 MHz can practically be used only for an operation at a rate of about 1.3 MHz.
The above problem is attributable to the fact that a VIDEO RAM cannot perform write and read operations at the same time.